日志

lib cell clock balancing offset in clock latency report

已有 2698 次阅读| 2018-5-29 20:48 |系统分类:芯片设计

Regarding the "lib cell clock balancing offset", this value

comes from the min/max_clock_tree_path library timing arcs.

If there is a min/max_clock_tree_path in the library for the ETM pin,CTS will use the delay coming from the min/max_clock_tree_path arcs forthe ETM pin while balancing the clock tree. For the longest path, itwill pick the delay from the max_clock_tree_path arc and for theshortest path it will pick the delay coming from themin_clock_tree_path.

To check the value we need to run the command

report_clock_qor -show_paths -to <pin> -type latency